lol

Inge- "wrmsr": ["0xc0011020:0x0", "0xc0011021:0x60", "0xc0011022:0x510000", "0xc001102b:0x1808cc16"],

For buggy 1st-gen Ryzens, in config.json for XMRig 5.4.0

"Exception thrown at 0x000001828D7613D2 in xmrig.exe: 0xC0000005: Access violation reading location 0xFFFFFFFFFFFFFFFF" and it points to "subpd xmm1,xmm9"

These buggy Ryzens are fun

the nearest instruction reading from memory is like 30 instructions before it

is this the opcache bug?

it's probably executing some nonsense

tevador yes, opcache bug

Interesting. It doesn't crash if I remove CBRANCH instructions from generated code.

and crashes within a few seconds if I have 25 CBRANCH per program.

So it's not about self-modifying code, but about switching between L1 code cache and Opcache after the jump.

just commenting out "jz" instructions in "test/jz" sequence fixes crashes

another completely trash article